A signal is said to be analog if it falls between two arbitrary levels, V_x and V_y, and can assume any one of an infinite number of values between V_x and V_y. If the analog signal, V(t), is time-dependent, it is a continuous function of time, so that its slope, dV/dt, is never infinite, which would imply an instantaneous change of value. Figure 1 illustrates how both an analog voltage and a digital voltage vary with time.

Figure 1 Analog and digital signals

Analog signals are processed by analog circuits. The principal feature of an analog circuit is its ability to process an analog signal faithfully, without distorting it—hence the expression hi-fidelity. A typical analog signal is produced at the output terminals of a microphone as someone speaks into it. The voltage varies continuously over some finite range, depending only on the loudness of the speech and on the physical characteristics of the microphone. An amplifier may be used to increase the amplitude of this time-varying signal to a level suitable for driving a loudspeaker. If the voltage gain of the amplifier is A, and the voltage from the microphone V(t), the output of the amplifier is equal to A·V(t). The output signal from the amplifier, like the input, has an infinite range of values, but within a range A times that of the signal from the microphone.

The conversion of an analog quantity into a digital value requires two separate operations; the extraction of a sample value of the signal to be processed and the actual conversion of that sample value into a binary form. Figure 2 gives the block diagram of an analog signal acquisition module. As the analog-to-digital converter (ADC) at the heart of this module may be rather expensive, it is not unusual to provide a number of different analog channels, all using the same ADC.

Each analog channel in figure 2 begins with a transducer that converts an analog quantity into an electrical value. A transducer exploits some physical property of matter to perform the conversion process. For example, the thermistor is a transducer composed of a substance whose electrical resistance varies with temperature.

Figure 2 An analog signal acquisition module

The electrical signal from the transducer is frequently very tiny (sometimes only a few microvolts) and must be amplified before further processing in order to bring it to a level well above the noise voltages present in later circuits.

After amplification comes filtering, a process designed to restrict the passage of certain signals through the circuit. Filtering blocks signals with a frequency above or below a cut-off point; for example, if the signal from the transducer contains useful frequency components only in the range 0 to 20 Hz (as one might expect from, say, an electrocardiogram), it is beneficial to filter out all signals of a higher frequency. These out of band signals represent unwanted noise and have no useful effect on the interpretation of the electrocardiogram. Moreover, it is necessary for the filter to cut out all frequencies above one half the rate at which the analog signal is sampled. The reasons for this are explained later.

The outputs of the filters are fed to an electronic switch called a multiplexer that selects one of the analog input channels for processing. The multiplexer is controlled by the digital system to which the signal acquisition module is connected. The only purpose of the multiplexer is to allow one analog-to-digital converter to be connected to several inputs.

The analog output of the multiplexer is applied to the input of the last analog circuit in the acquisition module, the sample and hold (S/H) circuit. The sample and hold circuit takes an almost instantaneous sample of the incoming analog signal and holds it constant while the analog-to-digital converter, ADC, is busy determining the digital value of the signal. If the input signal is changing rapidly, the output of an ADC (which takes an appreciable time to perform its conversion) would be meaningless without a S/H circuit to staticize the input.

The analog-to-digital converter (DAC) transforms the voltage at its input into an m-bit digital value, where m varies from typically 4 to 16 or more. Several types of analog-to-digital converter are discussed at the end of this section.

Two fundamental questions have to be asked when considering any analog-to-digital converter. Into how many levels or values should the input signal be divided and how often should the conversion process be carried out? Let’s look at an ideal three-bit analog-to-digital converter that converts a voltage into a binary code. As the analog input to this ADC varies in the range 0 V to 7.5 V, its digital output varies from 000 to 111. Figure 3 provides a transfer function for this ADC.

Figure 3 The transfer function of an ideal 3-bit A/D converter

Consider the application of a linear voltage ramp input from 0.0 V to 7.5 V to this ADC. Initially the analog input is 0.0 V and the digital output 000. As the input voltage rises, the output remains at 000 until the input passes 0.5 V, at which point the output code jumps from 000 to 001. The output code remains at 001 until the input rises above 1.5 V. Clearly, for each 1.0 V change in the input, the output code changes by one unit. Figure 3 shows that the input can change in value by up to 1 V without any change taking place in the output code.

The resolution of an ADC, Q, is the largest change in its input required to guarantee a change in the output code and is 1.0 V in this example. The resolution of an ADC is expressed indirectly by the number of bits in its output code, where resolution = V_maximum/2ⁿ-1. For example, an 8-bit ADC with an input in the range 0 V to +8.0 V has a resolution of 8.0 V/255 = 0.03137 V = 31.37 mV. Table 1 gives the basic characteristics of ADCs with digital outputs ranging from 4 to 16 bits.

The column labeled "value of Q for 10 V FS" in table 12.3 indicates the size of the step (i.e., Q) if the maximum output of the ADC is 10 V. The abbreviation "FS" means "full-scale".

Figure 4 provides a graph of the difference or error between the analog input of a 3-bit ADC and its digital output. Suppose that the analog input is 5.63 V. The corresponding digital output is 110 which represents 6.0 V; that is, the digital output corresponds to the quantized input, rather than the actual input. The difference between the actual input and the "idealized" input corresponds to an error of 0.37 V. Figure 4 shows that the maximum error between the input and output is equal to Q/2. This error is called the quantization error.

Table 1 The performance of ideal analog-to-digital converters

Figure 4 The error function of an ideal 3-bit A/D converter

The output from a real ADC can be represented by the output from a perfect ADC whose input is equal to the applied signal plus a noise component. The difference between the input and the quantized output (expressed as an analog value) is a time-varying signal between +Q/2 and -Q/2 and is called the quantization noise of the ADC.

A figure of merit of any analog system is its signal-to-noise ratio that measures the ratio of the wanted signal to the unwanted signal (i.e., noise). The signal-to-noise ratio, SNR, of a system is expressed in units called decibels, named after Graham Bell, the inventor of the telephone. The SNR ratio of two signals is defined as 20log(V_signal/V_noise). The signal to noise ratio of an ideal n-bit ADC is given by:

SNR (in dB) = 20log( 2ⁿQ )/Q/Ö 12 = 20log(2ⁿ) + 20log(12) = 6.02n + 10.8.

Intuitively, we would expect the rate at which a signal must be sampled to be closely related to the rate at which it is changing. For example, a computer controlling the temperature of a swimming pool might need to sample the temperature of the water no more than once every ten minutes. The thermal inertia of such a large body of water doesn’t permit sudden changes in temperature. Similarly, if a microcomputer is employed to analyze human speech with an upper frequency limit of 3,000 Hz, it is reasonable to expect that the input from a microphone must be sampled at a much greater rate than 3,000 times a second, simply because in the space of 1/3,000 second the signal can execute a complete sine wave.

Fortunately for the designer of signal acquisition systems, a simple relationship exists between the rate at which a signal changes and the rate at which it must be sampled if it is to be reconstituted from the samples without any loss of information content. The so called Sampling Theorem states: 'If a continuous signal containing no frequency components higher than f_c is sampled at a rate of at least 2f_c, then the original signal can be completely recovered from the sampled value without distortion'. This minimum sampling rate is called the Nyquist rate.

There are two important points to note about this theorem. The highest frequency component in the signal means just that and includes any noise or unwanted signals present together with the desired signal. For example, if a signal contains speech in the range 300 to 3,000 Hz and noise in the range 300 to 5,000 Hz, it must be sampled at least 10,000 times a second. One of the purposes of filtering a signal before sampling it is to remove components whose frequencies are higher than the signals of interest, but whose presence would nevertheless determine the lower limit of the sampling rate.

If a signal, whose maximum frequency component is f_c, is sampled at less than 2f_c times a second, some of the high-frequency components in it are folded back into the spectrum of the wanted signal. In other words, sampling a speech signal in the range 300 to 3,000 Hz containing noise components up to 5,000 Hz at only 6,000 times a second would result in some of this noise appearing within the speech band. This effect is called frequency folding and, once it has occurred, there is no way in which the original, wanted, signal can be recovered.

The classic example of sampling at too low a rate is the wagon wheel effect that you sometimes see in movies. A cine film runs at 24 frames/s and each frame samples the image. If the spokes of a rotating wheel are sampled at too low a rate, the wheel appears to move backward. Why? Suppose a wheel rotates 10° clockwise between each frame. The eye perceives this as a clockwise rotation. Now suppose the wagon is moving rapidly and the wheel rotates 350° between each frame. The eye perceives this as a 10° counterclockwise rotation.

In addition to the above consideration of the sampling frequency, we also have to think about the time taken by the sampling process itself. It is very unlikely that a real signal acquisition module would have to deal with an entirely static input. Signals of interest are time-dependent. One question we should ask is, "What happens if a signal changes while it is being measured (i.e., digitized)?" Figure 5 illustrates the problem of trying to measure a dynamic quantity. Suppose the quantization process takes t_a seconds, which is called the aperture time. The term "aperture time" suggests an analogy with the camera—the image is captured when the camera's aperture (i.e., shutter) is open. During this time, the input voltage being measured changes by d V, where d V is given by:

t_a·dV/dt

The value of dV/dt is the slope of the graph. The change in the input, d V, is called the amplitude uncertainty. A perfect, instantaneous digitizer has a zero aperture time and d V = 0, resulting in a spot-sample of the input.

Figure 5 The effect of a finite measurement time on the A/D conversion process

Suppose we apply a linearly rising ramp voltage to the input of an analog-to-digital converter that has a full-scale range of 5 V. Let’s imagine that the input changes by 5 V in 100 ms which corresponds to a rate-of-change of 5 V per 100 ms = 50 V/s. If the analog-to-digital converter takes 1 ms to perform a conversion, we can write:

d V = t_a·dV(t)/dt = 1 ms x 50 V/s = 1 x 10^-3 x 50 V/s = 0.05 V.

That is, the input changes by 0.05 V during the period that the A/D conversion is taking place. Consequently, there is little point in using an ADC with a resolution of more that 0.05 V. This resolution corresponds to 0.05 in 5, or 1 in 100, and a 7-bit ADC would be suitable for this application.

In order to get a feeling for the importance aperture time, let’s consider a data acquisition system in processing human speech. Suppose a system has an 8-bit analog-to-digital converter and is required to digitize an input with an upper frequency limit of 4,000 Hz. We need to know the maximum aperture time necessary to yield an accuracy of one least significant bit in the digitized output. Assuming a sinusoidal input (i.e., V(t) = Vsin w t), the amplitude uncertainty is given by:

d V = t_a·d (Vsin w t)/dt = t_a·w ·V·cos w t

The differential of sin w t is w ·cos w t, where w is defined as 2p f. The maximum rate of change of V(t) occurs at the zero-crossing of the waveform when t = 0 (i.e., the maximum value of cos w t is 1). Therefore,

d V = t_a·V·w

and d V/V = t_a ·w = t_a·2p · f

We can substitute 1/256 for d V/V and 4,000 Hz for f in the above equation to calculate the desired aperture time as follows:

d V/V = 1/256 = t_a2p f = t_a x 2 x 3.142 x 4,000

t_a = 1/(256 x 2 x 3.142 x 4,000) s = 0.146 m s

An aperture time of 0.146 m s (i.e., 146 ns) is very small, although not too small to be achieved by the some ADCs. Fortunately, we can use a sample and hold circuit to capture a sample of the input and hold it constant while a relatively slow and cheap ADC performs the conversion. Of course, even a sample and hold circuit is itself subject to the effects of aperture uncertainty. Although an aperture time of 1 m s is relatively small for an analog-to-digital converter, a sample and hold circuit can achieve an aperture time of 50 ns with little effort. We look at the sample and hold circuit in more detail later.

A section on digital-to-analog converters, DACs, at this point may seem a little out of place. It is more logical to discuss analog-to-digital conversion first and then deal with the inverse process. There are two reasons for disregarding this natural sequence. The first is that the DAC is very much less complex than the corresponding ADC, and the second is that some analog-to-digital converters, paradoxically, have a digital-to-analog converter at their heart.

Conceptually, the DAC is a very simple device. If a binary value is to be converted into analog form, all we have to do is to generate an analog value proportional to each bit of the digital word and then add these values to give a composite analog sum. Figure 6 illustrates this process. An m-bit digital signal is latched by m D flip-flops and held constant until the next value is ready for conversion. The flip-flops constitute a digital sample and hold circuit. Each of the m bits operates an electronic switch that passes either zero or V_i volts to an analog adder, where V_i is the output of the ith switch. The output of this adder is:

V = d₀V₀ + d₁V₁ + ... + d_m-1V_m-1

Note that the m {d_i} in this equation represent binary values 0 or 1, and the {V_i} represent binary powers of the form (1, 1/2, 1/4, 1/8,...).

Figure 6 The digital-to-analog converter

Although converting a digital value into an analog signal is relatively easy, converting an analog quantity into a digital value is rather more difficult. In fact, apart from one special type of A/D converter, analog-to-digital conversion is performed in a roundabout way.

The feedback analog-to-digital converter, paradoxically, uses a digital-to-analog converter to perform the required conversion. Figure 7 illustrates the basic principle behind this class of converter. A local digital-to-analog converter transforms an m-bit digital value, D = d₀, d₁, ... , d_m-1, into an analog voltage, V_out. The value of the m-bit digital word D is determined by the block labeled control logic in one of the ways to be described later.

Figure 7 The feedback ADC

V_out from the DAC is applied to the inverting input of an operational amplifier and the analog input to be converted is applied to its non-inverting input. The output of the operational amplifier corresponds to an error signal, V_e, and is equal to A times (V_out - V_in), where A is the gain of the amplifier. This error signal is used by the control logic network to modify the digital data, D, to minimize the error signal A(V_out - V_in). When the difference between V_in and V_out is less than that between two quantized signal levels (i.e., Q), the conversion process is complete.

In plain English, the digital signal is varied by trial and error until the locally generated analog voltage is as close to the analog input as it is possible to achieve. The next step is to examine ways of implementing this trial and error process.

The simplest feedback A/D converter is the ramp converter (see figure 8) that uses a binary counter to generate the digital output, D. At the start of a conversion, the binary counter is cleared to 0. A new conversion process starts with the resetting of the RS flip-flop. When Q* goes high following a reset, the AND gate is enabled and clock pulses are fed to the m-bit binary up-counter. These pulses cause the output of the counter, D, to increase monotonically from zero (i.e., 0, 1, 2, ..., 2^{m - 1}).

The output from the counter is applied to both an m-bit output latch and a D/A converter. As the counter is clocked, the output of the local D/A converter ramps upwards in the manner shown in the timing diagram of figure 9. The locally generated analog signal is compared with the input to be converted in a digital comparator, whose output is the sign of the local analog voltage minus the input; that is, sign(V_out - V_in). When this value goes positive, the flip-flop is set. At the same time, its Q* output goes low, cutting-off the stream of clock pulses to the counter and its Q output goes high, providing an End_of_conversion (EOC) output and latching the contents of the binary counter into the output latches.

Figure 8 The ramp feedback ADC

Figure 9 Timing diagram of a ramp feedback ADC