Shift Operations
In a shift operation, all bits of the operand are moved one or more places left or right, subject to the variations described below. The 68000 is particularly well endowed with shift operations, as the following diagrams demonstrate.


All shifts can be categorized as logical, arithmetic, or circular. In a logical shift, a zero enters at the input of the shifter and the bit shifted out is clocked into the carry flip-flop of the CCR. An arithmetic shift left is identical to a logical shift left, but an arithmetic shift right causes the most significant bit, the sign bit, to be propagated right. This action preserves the correct sign of a two's complement value. For example, if the bytes 00101010 and 10101010 are shifted one place right (arithmetically), the results are 00010101 and 11010101, respectively. In a circular shift, the bit shifted out is moved to the position of the bit shifted in. No bit is lost during a circular shift.
The diagram shows that an arithmetic shift left and a logical shift left operation are virtually identical. In each case, all the bits are shifted one place left. The bit shifted out enters the carry bit and extend bit of the CCR and a zero enters the vacated position (the least significant bit). There is, however, one tiny difference between an ASL and an LSL. Since an arithmetic left shift multiplies a number by two, it is possible for the most significant bit of the value being shifted to change sign and therefore generate an arithmetic overflow. The V-bit of the CCR is set if this event occurs during an ASL. Because logical operations are applied to strings of bits, an LSL instruction clears the V-bit (since arithmetic overflow is meaningless when the bits being operated on do not represent an integer in signed form).
The figure describes the 68000s eight shift operations. The symbol C denotes the carry-bit of the condition code register, and X means the extend bit of the CCR.
Arithmetic shifts update all bits of the CCR. The N and Z bits are set or cleared as one would expect. The V bit is set if the most significant bit of the operand is changed at any time during the shift operation. The C and X bits are set according to the last bit shifted out of the operand. However, if the shift count is zero, C is cleared and X is unaffected. Logical shifts and rotates clear the V bit. The following table summarizes the effect of the 68000s shift instructions.
| Initial Value | After First Shift | CCR | After Second Shift | CCR | |
| XNZVC | XNZVC | ||||
| ASL | 11101011 | 11010110 | 11001 | 10101100 | 11001 |
| ASL | 01111110 | 11111100 | 01010 | 11111000 | 11011 |
| ASR | 11101011 | 11110101 | 11001 | 11111010 | 11001 |
| ASR | 01111110 | 00111111 | 00000 | 00011111 | 10001 |
| LSL | 11101011 | 11010110 | 11001 | 10101100 | 11001 |
| LSL | 01111110 | 11111100 | 01000 | 11111000 | 11001 |
| LSR | 11101011 | 01110101 | 10001 | 00111010 | 10001 |
| LSR | 01111110 | 00111111 | 00000 | 00011111 | 10001 |
| ROL | 11101011 | 11010111 | ?1001 | 10101111 | ?1001 |
| ROL | 01111110 | 11111100 | ?1000 | 11111001 | ?1001 |
| ROR | 11101011 | 11110101 | ?1001 | 11111010 | ?1001 |
| ROR | 01111110 | 00111111 | ?0000 | 10011111 | ?1001 |
Assembly Language Form of Shift Operations
All eight shift instructions are expressed in one of three ways. These are illustrated by the ASL (arithmetic shift left instruction).
| Mode 1 | ASL Dx,Dy | Shift Dy by Dx bits |
| Mode 2 | ASL #<data>,Dy | Shift Dy by #data bits |
| Mode 3 | ASL <ea> | Shift the contents at the effective address by one place |
A shift instruction can be applied to a byte, word, or longword operand with the exception of mode 3 shifts, which act only on longwords.
In mode 1, the source operand, Dx, specifies the number of places by which the destination operand, Dy, is to be shifted. Dy may be shifted by 1 to 32 bits. In mode 2, the literal, #<data>, specifies the number of places by which Dy is to be shifted. This must be in the range 1 to 8. In mode 3, the memory location specified by the effective address, <ea>, is shifted one place. Many microprocessors provide only the static shifts of modes 2 and 3. The 68000 permits dynamic shifts (i.e., mode 1), because the number of bits to be shifted is computed at run-time.